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# # old_revision [cc8258a6c3643514892e84cf24fed008bc6f9660] # new_revision [3dc5e7ac4bcb952cc267892653dd78ed095d8778] # # patch "crt0.s" # from [5b6b789fc104e92e95e61047448c05cbcfb0e3db] # to [87b5cd7607f8ac7300b0343c51a127633c3c6f5c] # ============================================================ --- crt0.s 5b6b789fc104e92e95e61047448c05cbcfb0e3db +++ crt0.s 87b5cd7607f8ac7300b0343c51a127633c3c6f5c @@ -7,15 +7,27 @@ .equ PLL_P, 2 .equ FLASHCLOCKS, 3 /* 40-60MHz clock */ - .equ APB_DIVIDER, 4 /* 1, 2 or 4 */ + .equ APB_DIVIDER, 1 /* 1, 2 or 4 */ .equ UND_STACK_SIZE, 0x0004 - .equ SVC_STACK_SIZE, 0x0004 + .equ SVC_STACK_SIZE, 0x0010 .equ ABT_STACK_SIZE, 0x0004 .equ FIQ_STACK_SIZE, 0x0004 .equ IRQ_STACK_SIZE, 0x0080 .equ USR_STACK_SIZE, 0x0400 + +.global _stack_size + + .equ _stack_size, 0 + .equ _stack_size, _stack_size + UND_STACK_SIZE + .equ _stack_size, _stack_size + SVC_STACK_SIZE + .equ _stack_size, _stack_size + ABT_STACK_SIZE + .equ _stack_size, _stack_size + FIQ_STACK_SIZE + .equ _stack_size, _stack_size + IRQ_STACK_SIZE + .equ _stack_size, _stack_size + USR_STACK_SIZE + + # Processor definitions .equ Mode_USR, 0x10 @@ -50,6 +62,8 @@ .equ APBDIV_BASE, 0xE01FC100 .equ APBDIV, 0 + .equ FP0XVAL, 0x3FFFC014 + # True is -1 so we subtract values together. .equ PLL_LOG_P, (0-(PLL_P>1)-(PLL_P>2)-(PLL_P>4)) .equ PLLCFG_VAL, (PLL_M-1) | (PLL_LOG_P << 5) @@ -173,14 +187,62 @@ lzi: b main # Undefined handlers can just spin for now + +# Turn on LED +# ldr r2, =FP0XVAL +# ldr r0, [r2, #0] +# bic r0, r0, #0x04000000 +# str r0, [r2, #0] +# b __back + +# Turn off LED +# ldr r2, =FP0XVAL +# ldr r0, [r2, #0] +# orr r0, r0, #0x04000000 +# str r0, [r2, #0] +# b __back + undefined_handler: -swi_handler: prefetch_abort_handler: data_abort_handler: fiq_handler: + mov r0, r14 + bl panic __back: b __back + + .equ SWI_MAX, 1 + +swi_handler: + stmfd sp!, {ip, lr} + ldr ip, [lr, #-4] + bic ip, #0xff000000 + + cmp ip, #SWI_MAX + ldmhifd sp!, {ip, pc}^ + + add ip, pc, ip, lsl #2 + ldr pc, [ip] + +swi_branch_table: + .word disable_interrupts + .word enable_interrupts + + +disable_interrupts: + mrs ip, SPSR + orr ip, ip, #I_Bit + msr SPSR_c,ip + ldmfd sp!, {ip, pc}^ + +enable_interrupts: + mrs ip, SPSR + bic ip, ip, #I_Bit + msr SPSR_c,ip + ldmfd sp!, {ip, pc}^ + + .endfunc .end