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This diff has been restricted to the following files: 'timer.c'
# # old_revision [8760ae9232295422550b79f09e55122390704b3c] # new_revision [dea51752ff3061ddca80de6685b04dac53ac77e1] # # patch "timer.c" # from [cd7a8d69e6c6dcdc33683f9f6dfcc98c62d77b4d] # to [bbb624ceb301647f8ffb240074c02ed3c3200135] # ============================================================ --- timer.c cd7a8d69e6c6dcdc33683f9f6dfcc98c62d77b4d +++ timer.c bbb624ceb301647f8ffb240074c02ed3c3200135 @@ -1,4 +1,6 @@ #include "timer.h" +#include "interrupt.h" +#include "uart.h" #define TIMER0BASE 0xE0004000 #define TIMER1BASE 0xE0008000 @@ -28,14 +30,29 @@ #define TCR_ENABLE (1<<0) #define TCR_RESET (1<<1) +#define MR0I (1<<0) +#define MR0R (1<<1) +#define MR0S (1<<2) +#define MR1I (1<<3) +#define MR1R (1<<4) +#define MR1S (1<<5) +#define MR2I (1<<6) +#define MR2R (1<<7) +#define MR2S (1<<8) +#define MR3I (1<<9) +#define MR3R (1<<10) +#define MR3S (1<<11) + +void __attribute__((interrupt("IRQ"))) timer_interrupt_handler(void); + void init_timer(void) { TREG(TCR) = TCR_ENABLE | TCR_RESET; TREG(CTCR) = 0; /* Use PCLK */ - TREG(TC) = 0; - TREG(PR) = TIMER_PRESCALE ; - TREG(PC) = 0; + TWREG(TC) = 0; + TWREG(PR) = TIMER_PRESCALE ; + TWREG(PC) = 0; TREG(TCR) = TCR_ENABLE; } @@ -51,3 +68,24 @@ void timer_delay_clocks(unsigned int clo while (((signed int) (time-TWREG(TC))) > 0); } +void timer_set_period(unsigned int period) +{ + TWREG(MR0) = period; + TWREG(MCR) = MR0I | MR0R; + interrupt_register(TIMER0, timer_interrupt_handler); +} + +void __attribute__((interrupt("IRQ"))) timer_interrupt_handler(void) +{ + unsigned int ir; + ir = TREG(IR); + TREG(IR) = ir; + + if (ir & (1<<0)) { + /* Match channel 0 */ + putstr(" *timer0* "); + } + + interrupt_clear(); +} +