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This diff has been restricted to the following files: 'crt0.s'

#
# old_revision [8760ae9232295422550b79f09e55122390704b3c]
# new_revision [9142f3330490a5aa00c1686475633b620c2ef5e7]
#
# patch "crt0.s"
#  from [adfe53d34fb8bcfcb9ecc9f2824f484661f0ec94]
#    to [87b5cd7607f8ac7300b0343c51a127633c3c6f5c]
#
============================================================
--- crt0.s	adfe53d34fb8bcfcb9ecc9f2824f484661f0ec94
+++ crt0.s	87b5cd7607f8ac7300b0343c51a127633c3c6f5c
@@ -7,15 +7,27 @@
 	.equ	PLL_P,		2
 
 	.equ	FLASHCLOCKS,	3 /* 40-60MHz clock */
-	.equ	APB_DIVIDER,	4 /* 1, 2 or 4 */
+	.equ	APB_DIVIDER,	1 /* 1, 2 or 4 */
 
 	.equ	UND_STACK_SIZE,	0x0004
-	.equ	SVC_STACK_SIZE,	0x0004
+	.equ	SVC_STACK_SIZE,	0x0010
 	.equ	ABT_STACK_SIZE,	0x0004
 	.equ	FIQ_STACK_SIZE,	0x0004
 	.equ	IRQ_STACK_SIZE,	0x0080
 	.equ	USR_STACK_SIZE,	0x0400
 
+
+.global _stack_size
+
+	.equ	_stack_size,  0
+	.equ	_stack_size, _stack_size + UND_STACK_SIZE
+	.equ	_stack_size, _stack_size + SVC_STACK_SIZE
+	.equ	_stack_size, _stack_size + ABT_STACK_SIZE
+	.equ	_stack_size, _stack_size + FIQ_STACK_SIZE
+	.equ	_stack_size, _stack_size + IRQ_STACK_SIZE
+	.equ	_stack_size, _stack_size + USR_STACK_SIZE
+
+
 # Processor definitions
 
 	.equ    Mode_USR,       0x10
@@ -50,6 +62,8 @@
 	.equ	APBDIV_BASE,	0xE01FC100
 	.equ	APBDIV,		0
 
+	.equ	FP0XVAL,	0x3FFFC014
+
 	# True is -1 so we subtract values together.
 	.equ	PLL_LOG_P,	(0-(PLL_P>1)-(PLL_P>2)-(PLL_P>4))
 	.equ	PLLCFG_VAL,	(PLL_M-1) | (PLL_LOG_P << 5)
@@ -69,7 +83,7 @@ vectors:
 	b	prefetch_abort_handler
 	b	data_abort_handler
 	nop	/* reserved */
-	b	irq_handler
+	ldr	pc, [pc, #-0xff0] /* branch through VICVectAddr register */
 	b	fiq_handler
 
 
@@ -173,15 +187,62 @@ lzi:
 	b	main
 
 # Undefined handlers can just spin for now
+
+# Turn on LED
+#	ldr	r2, =FP0XVAL
+#	ldr	r0, [r2, #0]
+#	bic	r0, r0, #0x04000000
+#	str	r0, [r2, #0]
+#	b	__back
+
+# Turn off LED
+#	ldr	r2, =FP0XVAL
+#	ldr	r0, [r2, #0]
+#	orr	r0, r0, #0x04000000
+#	str	r0, [r2, #0]
+#	b	__back
+
 undefined_handler:
-swi_handler:
 prefetch_abort_handler:
 data_abort_handler:
-irq_handler:
 fiq_handler:
+	mov	r0, r14
+	bl	panic
 
 __back:
 	b	__back
 
+
+	.equ	SWI_MAX, 1
+
+swi_handler:
+	stmfd	sp!, {ip, lr}
+	ldr	ip, [lr, #-4]
+	bic	ip, #0xff000000
+
+	cmp	ip, #SWI_MAX
+	ldmhifd	sp!, {ip, pc}^
+
+	add	ip, pc, ip, lsl #2
+	ldr	pc, [ip]
+
+swi_branch_table:
+	.word	disable_interrupts
+	.word	enable_interrupts
+
+
+disable_interrupts:
+	mrs	ip, SPSR
+	orr	ip, ip, #I_Bit
+	msr	SPSR_c,ip
+	ldmfd	sp!, {ip, pc}^
+
+enable_interrupts:
+	mrs	ip, SPSR
+	bic	ip, ip, #I_Bit
+	msr	SPSR_c,ip
+	ldmfd	sp!, {ip, pc}^
+
+
 .endfunc
 .end